As the speed of high performance microprocessors increases, the operating voltage of the microprocessors generally decreases while the operating current generally increases. In addition, as the performance and operating current of a microprocessor increase, the power supplied to the microprocessor tends to include more transient power spikes (large shifts in the power demanded by the microprocessor). For example, as a microprocessor executes instructions, particularly at faster rates, severe power transients are likely to occur. These severe current transients, if not properly regulated, can cause noise on the power supply that can induce errors in the microprocessor.
Typical power regulation and transient suppression systems include extensive decoupling devices, including capacitors that are placed across the load between the power supply and ground, in combination with an active voltage regulator to supply instantaneous charge to the microprocessor under dynamic operation. On-chip decoupling techniques, e.g., decoupling capacitors integrated on the die package, generally require a relatively large chip area and tend to reduce reliability of the microprocessor. Typical off-chip decoupling generally has limited effectiveness because of the parasitic inductance in the power supply leads. In addition, off-chip as well as on-chip active voltage regulation employing conventional circuit design approaches generally lack the bandwidth to respond to fast load transients and typical off-chip regulation approaches generally have limited effectiveness in responding to the transients because of the parasitic inductance between the regulation source and the load.
Wide bandwidth series linear regulators employing novel circuit design approaches can respond to the fast transients and provide significantly improved regulation over conventional approaches. However, such regulators may be problematic in several regards. For example, wide bandwidth series linear regulator regulate an entire load current consisting of both static and dynamic, resulting in a significant power dissipation by the wide bandwidth series linear regulator, and a corresponding reduction in the efficiency of the power delivery system.
U.S. Pat. No. 5,629,608, issued May 13, 1997 to Budelman and entitled “Power Regulation System for Controlling Voltage Excursions,” discloses a technique that uses a secondary voltage regulator in combination with a variable load element to provide dynamic voltage regulation. This approach uses a voltage window reference circuit to determine when to enable the high frequency secondary regulator. Because the secondary power regulator is not always “on,” the overall efficiency of the power regulator is greater than the efficiency of series linear regulators. One disadvantage of this approach, however, is that the window or “dead zone” in which only the slow response, primary voltage regulator is employed, creates a limitation in the effectiveness of the regulator to respond to fast transient events. An additional disadvantage is that the fast regulator is placed in an inactive or off state when the output voltage is within the established window range. Accordingly, the effectiveness of the regulator to rapidly respond to fast transient events that exceed the window range is thus limited by both the sense circuitry response and the turn-on time of the regulator from the inactive or “off state” to an active or “on-state.”
Accordingly, a need exists for a voltage regulator and system that overcome the problems of conventional power regulation devices and systems. In particular, regulators and systems that compensate for high current transients and that operate efficiently are desired.